成都武侯區
應屆畢業生
本科
2025-11-13 16:09:43
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職位描述
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Brief Description / 職位概述
This role will be responsible for the FPGA design and verification, which include defining top-level architecture as well as sub-level architecture, RTL coding, synthesizing, P
This role will be responsible for the FPGA design and verification, which include defining top-level architecture as well as sub-level architecture, RTL coding, synthesizing, P
工作地點
地址：成都武侯區知識產權金融大廈1棟1單元705號昂際智航
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職位發布者
Cass..HR
上海力德人才服務有限公司
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專業服務
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200-499人
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私營·民營企業
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梅園路77號
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